MTClass is a new, multi-threaded, modular Internet statistical traffic analysis engine capable of running in real-time on commodity hardware processing traffic from multiple NICs. Experimental results on a low cost dual six-core Xeon PC at 2.6GHz demonstrate that MTClass can process more than 7 million packets per second (5Gbps) using a Support Vector Machine (SVM) algorithm.

MTClass has been designed and developed by the NTW team.


MTClass is distributed under the classical BSD license. Please see also the LICENSE file, included in the distribution.


Please note that this version of MTClass is provided "AS IS" with no warranty whatsoever (see the LICENSE file), is intended for purely experimental and research purposes, and should be considered alpha-quality.

To download the tool follow this link: MTClass source

To download the Verilog code to implement packet muxer on a NetFPGA/1G boards please send an email to Francesco Gringoli